AI Is Reallocating the World’s Memory Factories

More DRAM will be produced as AI infrastructure expands. The harder problem is which products, customers and computing systems can gain access to advanced memory capacity before new factories arrive.

Samsung Electronics expects high-bandwidth memory to account for nearly 30 percent of the memory industry's DRAM wafer capacity in 2027, up from roughly 20 percent this year. TrendForce reaches almost the same endpoint from its own supply model: it estimates that HBM wafer input among Samsung, SK hynix and Micron will rise from about 18 percent of total DRAM wafer input at the end of 2025 to 30 percent by the end of 2027. Over the same period, HBM's share of DRAM bit supply is expected to rise from about 8 percent to only 13 percent. The two measures describe different parts of the manufacturing system and should not be turned into a simple efficiency ratio, but the gap shows why the AI memory boom can consume factory resources faster than its contribution to aggregate memory bits would suggest.

HBM is only one source of pressure. AI servers require large pools of conventional CPU memory, emerging products such as SOCAMM, and HBM attached to accelerators, while PC and mobile products still compete for DRAM production. TrendForce expects total DRAM bit supply to keep growing through 2027 while demand grows faster and the market remains undersupplied, in part because HBM requires more wafer input and meaningful output from many new fabs will arrive later. More memory is being made at the same time that usable advanced capacity remains scarce.

Memory makers are consequently making allocation decisions before finished products reach customers. Advanced wafers must be divided among products whose economics can change faster than factory plans, customers are entering supply discussions years before they consume the memory, and AI-chip designers are beginning to reconsider configurations when planned memory cannot be obtained on the original terms. New factories will eventually change that arithmetic. Until then, the value of memory capacity depends increasingly on where it is used and when it becomes available.

More Memory, Too Late

Micron's first new Idaho fab is scheduled to begin wafer output in mid-2027, followed by a second Idaho facility in late 2028, while its first New York fab lies on a still longer timetable. Samsung plans to make Pyeongtaek Line 5 a major HBM production base from 2028, and SK hynix's Yongin expansion stretches the physical buildout toward the end of the decade. Those projects represent real future supply, but construction completion, first wafer, yield ramp, customer qualification and meaningful commercial output are separate milestones. TrendForce expects substantial contributions from many new fabs to become visible mainly from 2028 even though suppliers begin adding capacity before then.

An AI-system maker building servers in 2027 cannot substitute a cleanroom that will produce qualified memory in 2029. A unit of manufacturing capacity available in those two years therefore has different economic value during the current buildout. The timing difference can be understood as capacity-time: capacity matters partly because of the date at which it becomes usable. Large fab announcements and acute current scarcity can coexist when investment schedules and customer production schedules sit on different calendars.

Micron is trying to shorten the nearer clock by pulling equipment spending forward inside existing operations while greenfield capacity develops more slowly. SK hynix is following a similar two-speed approach, accelerating production where installed or near-term infrastructure permits it while building much larger facilities for demand several years away. Existing cleanrooms, process improvements and equipment that can be installed sooner provide the fastest supply response. A completely new fab has to move through construction, equipment installation, process ramp and qualification before its nominal capacity becomes marketable memory.

Process migrations and new facilities could still relieve much of the imbalance later in the decade. The present shortage may ultimately prove to be an unusually powerful DRAM upcycle amplified by AI demand rather than a permanent break with the industry's historical cycles. Supply additions beginning in 2027 and becoming more substantial after that give the counterargument real weight. Their inability to satisfy memory needed earlier explains the current allocation pressure without requiring the pressure to last indefinitely.

What an HBM Wafer Gives Up

Micron describes HBM's manufacturing penalty in unusually direct terms in its regulatory filings. At the same technology node, the company says HBM requires more wafers and cleanroom space to produce the same number of bits as conventional DRAM because of its higher-performance design and more complex manufacturing process. HBM delivers the bandwidth required by AI accelerators by combining multiple DRAM dies with vertical interconnects and a base die, so the manufacturing resource consumed by a given amount of memory cannot be inferred from gigabytes alone.

TrendForce's wafer and bit estimates show the consequence at industry scale. HBM could take roughly 30 percent of DRAM wafer input among the three major suppliers by the end of 2027 while supplying about 13 percent of DRAM bits. Those figures are estimates rather than a physical constant, and different HBM generations, die sizes and yields alter the relationship. They nevertheless establish the direction of the constraint: expanding HBM output can consume an unusually large share of the advanced manufacturing base also needed for other forms of DRAM.

Front-end wafer capacity is only one part of that manufacturing system. HBM4 combines advanced DRAM with a logic base die, stacking and bonding, while yields, thermal behavior, advanced packaging and customer qualification can determine how quickly nominal capacity becomes sellable product. A problem in one of those stages does not translate automatically into the same shortage at the front end. Describing the entire AI memory bottleneck as a wafer shortage would erase the processes that determine how many finished HBM devices actually reach customers.

The wafer still matters because every advanced wafer has an alternative use. HBM, high-capacity server RDIMMs, LPDDR and SOCAMM, PC memory and mobile memory draw on overlapping production resources even though moving capacity among them requires planning, process changes and qualification. Capacity committed to one product cannot serve another at the same time. AI has therefore created a memory shortage in which several of the products competing for manufacturing resources are themselves being lifted by AI infrastructure demand.

AI Memory Competes With Itself

DDR5 produced one of the clearest signs of that competition in the first quarter of 2026. TrendForce estimated that per-wafer revenue from 64GB DDR5 RDIMMs overtook HBM and that HBM profitability also fell below the server-memory product, even though AI demand for HBM remained strong. Conventional DRAM prices had risen quickly since the second half of 2025 while annual HBM pricing adjusted more slowly, temporarily reversing the relative economics of two products that both serve AI infrastructure.

The reversal lasted long enough to expose an important feature of the allocation problem. HBM does not automatically provide the highest economic return from scarce manufacturing resources simply because it is strategically important to AI. Relative value changes with prices, usable output, yield, die size, manufacturing cost and contractual terms. A supplier deciding where to direct advanced production is comparing competing uses of the same factory rather than executing a fixed hierarchy in which HBM always comes first.

Factories cannot change product mix as quickly as those economics can move. Process conversion, yield learning, customer qualification and existing contractual obligations limit a supplier's ability to chase a temporary price advantage. The DDR5 crossover matters because market values moved within quarters while manufacturing plans and customer programs operate on much longer schedules. Capacity has to be allocated against expectations about future economics before those economics are fully known.

AI broadens the portfolio problem beyond a contest between HBM and older consumer products. Server CPU memory and HBM demand can rise together, while new architectures add other memory categories around accelerators and CPUs. A new AI server can require more HBM around GPUs and more conventional DRAM around CPUs at the same time. Memory suppliers increasingly face competition among multiple forms of AI-related demand inside the same production system.

Before Tomorrow's Output Is Made

Micron's own risk disclosure states the operating problem directly. When demand exceeds supply, the company says it has had to make decisions about manufacturing priorities and allocations across customers and markets. Public filings do not reveal which customers receive priority, how many wafers are assigned to individual accounts or what portion of a fab is committed to a particular buyer. They do confirm that scarcity becomes an allocation decision inside the supplier before finished memory is divided among customers.

Product development begins narrowing those choices well before shipment. Micron says specifications for new products may have to be decided multiple years before market introduction and that missing a customer's design schedule can eliminate a supplier from consideration for the product. Samsung's Custom HBM program provides another view of that earlier coordination, with memory capacity, speed, power characteristics and interfaces being tailored around particular accelerator and GPU architectures. Customer-specific engineering does not prove that physical wafer capacity has been reserved, but it commits part of the supplier's future product path while the customer's own computing platform is still being designed.

NVIDIA and SK hynix have formalized early coordination through a multiyear technology partnership that aligns next-generation memory development with NVIDIA's future AI infrastructure roadmap. The companies explicitly connect the relationship to long development cycles, advanced fabrication and the capital investment required to sustain memory supply. Their public announcements do not disclose preferential wafer allocations to NVIDIA. They do show a major customer's requirements entering memory development and supply planning before the corresponding systems reach volume production.

Micron's Strategic Customer Agreements add contractual force to the same time horizon. The company describes multiyear take-or-pay arrangements containing binding commitments for specified volumes, with pricing structures varying among contracts. Micron also warns that those agreements can constrain available supply and reduce its ability to react when market conditions change. Greater visibility into future demand comes with less freedom to redirect future output after prices, technologies or customer requirements have shifted.

Product specifications, qualification schedules, contracts and fab investment therefore move on a different clock from market pricing. Relative wafer economics can change within quarters while several of the decisions determining future production remain in place for years. Suppliers are allocating portions of tomorrow's output before they know with certainty what each product will ultimately be worth.

Customers Move Upstream

Micron entered the final quarter of 2026 with more than 75 percent of its 2027 output already committed, while most active customer discussions had moved toward 2028. Chief Executive Sanjay Mehrotra clarified that the figure covers the company's customer base broadly, including Strategic Customer Agreement customers, large buyers operating on annual arrangements and non-SCA customers placing early purchase orders. It cannot be read as the share of Micron's HBM capacity reserved under long-term contracts. It shows how far the purchasing calendar has moved ahead of the year in which much of the memory will actually be consumed.

Micron has signed 26 SCAs that it estimates will account for more than 35 percent of revenue through 2030, with financial commitments attached to those agreements and extensions reaching $32 billion, predominantly in cash deposits. Some agreements extend into 2031, and the portfolio covers the company's broader memory and storage business rather than HBM alone. Customers are committing volumes and capital to increase confidence that memory will be available when their own product roadmaps reach production. The agreements provide a stronger claim on future product supply without transferring ownership of the manufacturing resources that will eventually produce it.

Those commitments also give Micron greater visibility when it makes investments with multiyear lead times. Chief Financial Officer Mark Murphy has said strategic agreements provide enough forward visibility to proceed with greenfield capacity, while the company can decide later how fully to equip those fabs according to its most current view of demand. A factory that requires years to build needs a credible signal before the final orders it will serve arrive. Customer commitments can supply part of that signal while leaving later equipment and product-mix decisions with the supplier.

SK hynix is seeing the same shift through a different mix of relationships. The company says it has completed long-term agreements with around 10 customers and continues discussions with other major clients, while strategic customers such as NVIDIA enter both technology development and supply planning. The contractual forms differ among suppliers and buyers. The common change is that strategically important customers are entering qualification, roadmap and supply discussions long before finished inventory appears.

Micron continues to preserve capacity outside long-term agreements. Mehrotra has said the company wants flexibility to manage supply among existing customers, emerging customers and different end markets even as SCA coverage grows, and annual arrangements continue alongside multiyear commitments. AI-era scarcity has increased the importance of securing future supply earlier. Public evidence does not show an industry in which every future bit has become a fixed capacity reservation.

When Memory Becomes a Design Constraint

Google and Amazon are still increasing the absolute amount of HBM in major AI platforms. Google's Ironwood TPU carries 192 GiB of HBM per chip compared with 32 GiB on the preceding Trillium generation, while AWS Trainium3 increases memory capacity by 50 percent from Trainium2 to 144 GB of HBM3e. AMD's MI350X retains an exceptionally large 288 GB HBM3E pool, even though that capacity is not an increase over the immediately preceding MI325X. Larger models, longer contexts and more demanding workloads continue to place a premium on large high-bandwidth memory pools despite the supply constraint.

Micron has nevertheless observed scarcity changing the rate at which conventional memory content grows inside some servers. The company lowered its expectation for average server DRAM content growth under very tight allocation and said, in management's interpretation, that customers were moderating content in order to maximize the number of systems they could ship. Average memory per server can continue rising under that scenario while growing more slowly than it would under abundant supply. The observed revision in Micron's content outlook is stronger evidence than the company's explanation of why individual customers made the adjustment, so the two should remain distinct.

TrendForce has reported a similar tension in accelerator roadmaps. NVIDIA expanded evaluation of Rubin Ultra beyond a 12-Hi HBM4e configuration to include 8-Hi alternatives, while several cloud providers have evaluated lower HBM capacity for their own AI ASICs. TrendForce later described 8-Hi configurations as a priority evaluation option among multiple GPU and ASIC manufacturers facing constrained HBM supply and rising system costs. Those reports identify an emerging design response without establishing that the industry as a whole is moving toward lower-memory accelerators.

NVIDIA's regulatory filings confirm the underlying supply exposure on a different scale. Its supply-and-capacity commitments rose from $119 billion to $279 billion by late July, primarily to secure memory and manufacturing facilities for current and future data-center architectures. The filing does not say that memory scarcity caused a specific Rubin Ultra configuration to change. Supply risk is confirmed by NVIDIA itself; the connection to individual HBM configurations remains dependent on external supply-chain reporting.

Google's software stack shows how many other levers exist when memory becomes a finite system resource. FP8 can reduce the memory footprint of weights and activations relative to BF16, while rematerialization can exchange additional computation for lower HBM occupancy and host-memory offload can free HBM at the cost of slower data movement. Google does not attribute those techniques to the current memory shortage, and Ironwood itself carries far more HBM than its predecessor. The architecture nevertheless demonstrates that memory capacity, bandwidth, precision, compute and data placement can be traded against one another when workloads encounter a memory constraint.

SemiAnalysis has extended that resource accounting into an economic hypothesis it describes as tokens per HBM wafer. Its argument is that some inference systems may eventually gain more from preserving bandwidth while using shorter HBM stacks, allowing a fixed supply of DRAM wafers to produce more stacks and support more accelerators. The strongest 4-Hi version depends heavily on workload, model size, memory hierarchy and pricing assumptions, and evidence for 8-Hi evaluation is currently broader. The larger analytical point is that a manufacturing resource inside a memory fab can become a variable in the AI-system architect's optimization problem.

A lower-capacity accelerator does not by itself establish lower aggregate memory demand. A fixed supply of HBM distributed across more accelerators could reduce memory per device while supporting a larger fleet of machines, and the eventual result would depend on shipments, workloads and the other memory used by each system. Current evidence shows that scarcity is influencing some configuration decisions. It does not yet show whether those decisions will reduce the industry's total appetite for DRAM.

The Factory Tries to Catch Up

SK hynix is preparing physical room for future production without committing all of the manufacturing equipment at the same time. Its Yongin plans call for production infrastructure to be secured against medium- and long-term customer demand while cleanroom expansion and equipment installation proceed sequentially as actual demand develops. The company is simultaneously accelerating nearer-term production at facilities such as M15X and preparing much larger capacity for later in the decade. Even during a severe shortage, management continues to emphasize investment efficiency and staged execution.

Micron is applying a similar separation between physical construction and later equipment decisions. The company is pulling forward equipment where existing cleanrooms can increase output sooner while using customer visibility to proceed with longer-dated greenfield facilities. Management has said those fabs can be equipped according to the demand environment visible closer to the time production begins. Building the infrastructure first preserves the ability to revise later decisions about how much capacity to activate and which products it should serve.

Samsung can use more of its existing manufacturing base before the next major expansion arrives. The company says earlier investment in DRAM capacity and cleanrooms allows HBM4 production to increase on a shorter timetable, while Pyeongtaek Line 5 is intended to become a major HBM production base from 2028. Existing cleanroom flexibility and new physical construction therefore operate on different clocks even inside the same supplier.

TrendForce expects the resulting supply growth to arrive in waves. Process migration, optimization of existing fabs and fewer product conversions can increase bit output before new buildings make a substantial contribution, while equipment installation, materials, yield ramp and customer qualification continue after the cleanroom itself exists. The size of an announced factory says relatively little about memory available during the present shortage until that space has been equipped and converted into qualified output.

Staged expansion also preserves flexibility against a market that can change before a fab is complete. Customer commitments provide visibility for infrastructure decisions made years ahead, while later equipment and product-mix choices can respond to information unavailable when construction began. Buyers face the risk that too little memory will exist when they need it. Suppliers face the opposite risk that today's demand, prices and preferred products will look different when the new capacity is finally ready.

The factories now under construction keep the cyclical counterargument alive. Substantial capacity additions from 2028 onward could weaken the allocation pressure that has pushed customers toward longer agreements and suppliers toward difficult choices among products. Current scarcity can reshape contracts, investment and system design while still proving temporary. Construction establishes a credible supply response, but it cannot reveal the market those fabs will enter when their qualified output arrives.

Can This Allocation Regime Last?

High memory prices have strengthened the economics of expansion, while long customer commitments give suppliers greater visibility when they decide whether to proceed with projects whose lead times stretch across several years. Micron is accelerating capital investment, Samsung is expanding HBM production and preparing additional Pyeongtaek capacity, and SK hynix is building a much larger Korean manufacturing base. Scarcity is therefore generating a supply response that can eventually weaken the conditions that created it.

That response remains slow. TrendForce expects DRAM demand growth to continue exceeding supply expansion in 2027 and substantial output from many new fabs to become visible mainly from 2028. J.P. Morgan has argued that the market underestimates how long equipment and construction take, while TechInsights views AI data-center demand, HBM's heavy manufacturing requirements and fab lead times as reasons for unusually persistent tightness. Those forecasts differ in duration and severity, but they explain why customers are securing future supply before the new factories are available.

Long-term contracts could alter the shape of the adjustment without eliminating the cycle. TechInsights argues that greater use of LTAs may reduce the volatility created by short planning horizons, and memory suppliers emphasize the investment visibility they obtain from multiyear commitments. Other analysts have pointed to previous memory downturns in which buyers sought to renegotiate agreements once oversupply returned and bargaining power shifted. The durability of today's stronger take-or-pay structures has not yet been tested by a future glut.

AI-system architecture can respond much faster than a greenfield fab. GPU and ASIC developers are already evaluating different HBM configurations, while software can exchange precision, recomputation or slower tiers of memory for lower pressure on the fastest memory. Those adjustments may allow a given supply of memory to support more compute, but current evidence does not establish whether aggregate memory demand will fall as a result. Workloads are becoming more memory-intensive at the same time that designers are trying to use available memory more efficiently.

SK hynix can prepare infrastructure before deciding how quickly to fill every cleanroom with equipment, Micron can accept multiyear customer commitments while preserving part of its later supply flexibility, and accelerator designers can alter memory configurations before additional HBM wafers exist. Each is responding to the same gap between demand visible now and manufacturing capacity that arrives later, and each response can change the market the others eventually face. The new fabs will add memory; their cleanrooms cannot tell us which products, customers or AI systems will be competing for that memory when qualified output finally leaves the factory.